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  ?2007 fairchild semiconductor corporation 1 www.fairchildsemi.com fdd3n40 / fdu3n40 rev. a fdd3n40 / fdu3n40 400v n-channel mosfet february 2007 unifet tm fdd3n40 / fdu3n40 400v n-channel mosfet features ? 2a, 400v, r ds(on) = 3.4 ? @v gs = 10 v ? low gate charge ( typical 4.5 nc) ?low c rss ( typical 3.7 pf) ?fast switching ? 100% avalanche tested ? improved dv/dt capability description these n-channel enhancement mode power field effect transistors are produced using fairchild?s proprietary, planar stripe, dmos technology. this advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. these devices are well suited for high efficient switched mode power supplies and active power factor correction. absolute maximum ratings thermal characteristics d g s i-pak fdu series d-pak fdd series g s d g s d symbol parameter fdd3n40 / fdu3n40 unit v dss drain-source voltage 400 v i d drain current - continuous (t c = 25 c) - continuous (t c = 100 c) 2.0 1.25 a a i dm drain current - pulsed (note 1) 8.0 a v gss gate-source voltage 30 v e as single pulsed avalanche energy (note 2) 46 mj i ar avalanche current (note 1) 2a e ar repetitive avalanche energy (note 1) 3mj dv/dt peak diode recovery dv/dt (note 3) 4.5 v/ns p d power dissipation (t c = 25 c) - derate above 25 c 30 0.24 w w/ c t j, t stg operating and storage temperature range -55 to +150 c t l maximum lead temperature for soldering purpose, 1/8? from case for 5 seconds 300 c symbol parameter typ max unit r jc thermal resistance, junction-to-case -- 4.2 c/w r ja thermal resistance, case-to-sink typ. -- 110 c/w * drain current limited by maximum junction temperature
2 www.fairchildsemi.com fdd3n40 / fdu3n40 rev. a fdd3n40 / fdu3n40 400v n-channel mosfet package marking and ordering information electrical characteristics t c = 25c unless otherwise noted notes: 1. repetitive rating: pulse width limit ed by maximum junction temperature 2. l = 20mh, i as = 2a, v dd = 50v, r g = 25 ? , starting t j = 25 c 3. i sd 2a, di/dt 200a/ s, v dd bv dss , starting t j = 25 c 4. pulse test: pulse width 300 s, duty cycle 2% 5. essentially independent of operating temperature typical characteristics device marking device package reel size tape width quantity fdd3n40 FDD3N40TM d-pak 380mm 16mm 2500 fdd3n40 fdd3n40tf d-pak 380mm 16mm 2000 fdu3n40 fdu3n40tu i-pak - - 70 symbol parameter conditions min. typ. max units off characteristics bv dss drain-source breakdown voltage v gs = 0v, i d = 250 a 400 -- -- v ? bv dss / ? t j breakdown voltage temperature coefficient i d = 250 a, referenced to 25 c--0.4--v/ c i dss zero gate voltage drain current v ds = 400v, v gs = 0v v ds = 320v, t c = 125 c -- -- -- -- 1 10 a a i gssf gate-body leakage current, forward v gs = 30v, v ds = 0v -- -- 100 na i gssr gate-body leakage current, reverse v gs = -30v, v ds = 0v -- -- -100 na on characteristics v gs(th) gate threshold voltage v ds = v gs , i d = 250 a3.0--5.0v r ds(on) static drain-source on-resistance v gs = 10v, i d = 1a -- 2.8 3.4 ? g fs forward transconductance v ds = 40v, i d = 1a (note 4) -- 2 -- s dynamic characteristics c iss input capacitance v ds = 25v, v gs = 0v, f = 1.0mhz -- 173 225 pf c oss output capacitance -- 30 40 pf c rss reverse transfer capacitance -- 3.7 6 pf switching characteristics t d(on) turn-on delay time v dd = 200v, i d = 3a r g = 25 ? (note 4, 5) -- 10 30 ns t r turn-on rise time -- 30 70 ns t d(off) turn-off delay time -- 10 30 ns t f turn-off fall time -- 25 60 ns q g total gate charge v ds = 320v, i d = 3a v gs = 10v (note 4, 5) -- 4.5 6 nc q gs gate-source charge -- 1.2 -- nc q gd gate-drain charge -- 2 -- nc drain-source diode characteristics and maximum ratings i s maximum continuous drain-source diode forward current -- -- 2 a i sm maximum pulsed drain-source diode forward current -- -- 8 a v sd drain-source diode forward voltage v gs = 0v, i s = 2a -- -- 1.4 v t rr reverse recovery time v gs = 0v, i s = 3a di f /dt =100a/ s (note 4) -- 210 -- ns q rr reverse recovery charge -- 0.75 -- c
3 www.fairchildsemi.com fdd3n40 / fdu3n40 rev. a fdd3n40 / fdu3n40 400v n-channel mosfet typical performance characteristics figure 1. on-region characteristics figure 2. transfer characteristics figure 3. on-resistance variation vs. figure 4. body diode forward voltage drain current and gate voltage v ariation vs. s ource current and temperatue figure 5. capacitance characteristics figure 6. gate charge characteristics 45678910 10 0 10 1 150 o c 25 o c -55 o c * notes : 1. v ds = 40v 2. 250 s pulse test i d , drain current [a] v gs , gate-source voltage [v] 10 -1 10 0 10 1 10 -2 10 -1 10 0 10 1 v gs top : 15.0 v 10.0 v 8.0 v 7.0 v 6.5 v 6.0 v bottom : 5.5 v * notes : 1. 250 s pulse test 2. t c = 25 o c i d , drain current [a] v ds , drain-source voltage [v] 0123456 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 v gs = 20v v gs = 10v * note : t j = 25 o c r ds(on) [ ? ], drain-source on-resistance i d , drain current [a] 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 10 -1 10 0 10 1 150 o c * notes : 1. v gs = 0v 2. 250 s pulse test 25 o c i dr , reverse drain current [a] v sd , source-drain voltage [v] 10 -1 10 0 10 1 0 50 100 150 200 250 300 350 c iss = c gs + c gd (c ds = shorted) c oss = c ds + c gd c rss = c gd * note : 1. v gs = 0 v 2. f = 1 mhz c rss c oss c iss capacitances [pf] v ds , drain-source voltage [v] 012345 0 2 4 6 8 10 12 v ds = 200v v ds = 80v v ds = 320v * note : i d = 3a v gs , gate-source voltage [v] q g , total gate charge [nc]
4 www.fairchildsemi.com fdd3n40 / fdu3n40 rev. a fdd3n40 / fdu3n40 400v n-channel mosfet typical performance characteristics (continued) figure 7. breakdown voltage variatio n figure 8. on-resistance variation vs. temperature vs. temperature figure 9. maximum safe operating area figure 10. maximum drain current vs. case temperature figure 11. transient thermal response curve -100 -50 0 50 100 150 200 0.0 0.5 1.0 1.5 2.0 2.5 3.0 * notes : 1. v gs = 10 v 2. i d = 1 a r ds(on) , (normalized) drain-source on-resistance t j , junction temperature [ o c] -100 -50 0 50 100 150 200 0.8 0.9 1.0 1.1 1.2 * notes : 1. v gs = 0 v 2. i d = 250 a bv dss , (normalized) drain-source breakdown voltage t j , junction temperature [ o c] 10 0 10 1 10 2 10 -2 10 -1 10 0 10 1 100 ms 1 ms 10 s dc 10 ms 100 s operation in this area is limited by r ds(on) * notes : 1. t c = 25 o c 2. t j = 150 o c 3. single pulse i d , drain current [a] v ds , drain-source voltage [v] 25 50 75 100 125 150 0.0 0.5 1.0 1.5 2.0 2.5 i d , drain current [a] t c , case temperature [ o c] 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 10 -1 10 0 * n otes : 1. z jc (t) = 4.2 o c/w max. 2. d uty f actor, d =t 1 /t 2 3. t jm - t c = p dm * z jc (t) single pulse d=0.5 0.02 0.2 0.05 0.1 0.01 z jc (t), thermal response t 1 , square w ave pulse duration [sec] t 1 p dm t 2
5 www.fairchildsemi.com fdd3n40 / fdu3n40 rev. a fdd3n40 / fdu3n40 400v n-channel mosfet gate charge test circuit & waveform resistive switching test circuit & waveforms unclamped inductive switching test circuit & waveforms
6 www.fairchildsemi.com fdd3n40 / fdu3n40 rev. a fdd3n40 / fdu3n40 400v n-channel mosfet peak diode recovery dv/dt test circuit & waveforms
7 www.fairchildsemi.com fdd3n40 / fdu3n40 rev. a fdd3n40 / fdu3n40 400v n-channel mosfet mechanical dimensions d-pak
8 www.fairchildsemi.com fdd3n40 / fdu3n40 rev. a fdd3n40 / fdu3n40 400v n-channel mosfet mechanical dimensions i-pak
? 2007 fairchild semiconductor corporation www.fairchildsemi.com trademarks the following are registered and unregistered trademarks fairchild semiconductor owns or is authorized to use and is not intend ed to be an exhaustive list of all such trademarks. acex ? across the board. around the world. ? activearray ? bottomless ? build it now ? coolfet ? crossvolt ? ctl? current transfer logic? dome ? e 2 cmos ? ecospark ? ensigna ? fact quiet series? fact ? fast ? fastr ? fps ? frfet ? globaloptoisolator ? gto ? hisec ? i-lo ? implieddisconnect ? intellimax ? isoplanar ? microcoupler ? micropak ? microwire ? msx ? msxpro ? ocx ? ocxpro ? optologic ? optoplanar ? pacman ? pop ? power220 ? power247 ? poweredge ? powersaver ? powertrench ? programmable active droop ? qfet ? qs ? qt optoelectronics ? quiet series ? rapidconfigure ? rapidconnect ? scalarpump ? smart start ? spm ? superfet ? supersot ? -3 supersot ? -6 supersot ? -8 tcm ? the power franchise ? ? tinyboost ? tinybuck ? tinylogic ? tinyopto ? tinypower ? tinywire ? trutranslation ? serdes ? uhc ? unifet ? vcx ? wire ? disclaimer fairchild semiconductor reserves the right to make changes without further notice to any products herein to improve reliability, function or design. fai rchild does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others. these spec ifications do not expand the terms of fairchild?s worldwide terms and conditions, specifically th e warranty therein, which covers these products. life support policy fairchild?s products are not authorized for use as critical components in life support devices or systems without the express written approval of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. a critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. product status definitions definition of terms datasheet identification product status definition advance information formative or in design this dat asheet contains the design specifications for product development. specifications may c hange in any manner without notice. preliminary first production this datasheet contains preliminar y data; supplementary data will be published at a later date. fairchild se miconductor reserves the right to make changes at any time wit hout notice to improve design. no identification needed full production this datasheet cont ains final specifications . fairchild semiconductor reserves the right to make changes at any time without notice to improve design. obsolete not in production this datasheet cont ains specifications on a product that has been discontinued by fairchild semiconducto r. the datasheet is printed for reference information only. rev. i23


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